E-Series Data Processing Units
Empower next-generation infrastructure through open, software-defined architecture
Fully software-defined DPUs, from 200G to 800G.
200–800 Gbps
Throughput
8–64 Arm N2 cores
In data path
One software stack
XDP, DPDK, SPDK
No slow path
Every core processes packets
Why E-series
Traditional DPUs use rigid pipelines, with Arm cores reserved for exception handling. E-Series places every core directly in the data path, from 8 cores at the edge to 64 in the data center, with a standard Linux programming model.
Software-defined architecture
Accelerate innovation and efficiency with easily programmable, software-defined silicon built for rapid development. Program with XDP, DPDK, SPDK. No proprietary SDK required. Arm System Ready.
There is no slow path
Every Neoverse N2 core processes packets, from the 8-core E1L to the 64-core E1. The only DPUs with no exception-handling slow path.
Built to scale
Converge compute, storage and networking on one architecture, then scale it from an edge appliance to an 800G data-center card without changing your software.
E-Series DPUs
E1 Data Processing Unit
800G | 64 Arm Cores | 5nm
The industry's first 800G DPU. 64 Arm Neoverse N2 cores in the data path deliver 4× the CPU performance of existing designs. No slow path. Standard Linux development.
Available in three form factors:
- E1-Server: 1RU edge server
- E1-AIC: PCIe add-in card
- E1-SoC: Silicon for custom designs
E1L Data Processing Unit
200G | Up to 22 Arm N2 cores | Linux data plane
Featuring the industry’s only programmable Arm-based data plane DPU, with up to 22 N2 cores, the E1L integrates 200 Gbps of accelerated networking, wire-speed inline security, storage offloads, and a customizable PCIe fabric. The E1L devices can be deployed as DPUs to handle distributed services, or as a host for scale-out.
Available in three form factors:
- E1L-COM-Express: standard COMe card for control-plane applications
- E1L-Server: 1RU compute system with 200G integrated networking
- E1L-SoC: discrete device for DPU or scale-out host deployments
Which E-Series?
E-Series architecture
E-Series integrates compute, networking, and storage acceleration on a single die with a coherent memory architecture. Unlike traditional DPUs that require packet copies between domains, E-Series enables zero-copy data movement across all functions.
Shown at E1 scale — E1L implements the same architecture at 200G.
Familiar development model
Unlike DPUs that require P4 or proprietary tools, E-Series uses the same Linux frameworks your team already knows.
XDP
Express Data Path for high-performance packet processing.
DPDK
Data Plane Development Kit for userspace networking.
SPDK
Storage Performance Development Kit for NVMe acceleration.
SONiC
Full SONiC DASH support for cloud-native networking.
Validated performance
First to Pass DASH Testing at 800G Scale
E1 exceeded SONiC-DASH Hero 800G benchmark requirements by 19%, achieving 14.3 million connections per second with zero dropped packets.
Key Results:
- 14.3M connections/second (19% above requirement)
- 120M background connections maintained
- Zero packet drops under full load
— Independent test lab validation, November 2024
“E1 should deliver about four times the CPU performance of existing DPU designs.”
Dan Roth
Wheeler's Network
“The E1 is setting new standards of performance.”
Dong Wei
Arm Standards Architect and Fellow
Downloads
Design-In Resources
Available with NDA access
- Functional and Hardware specifications
- Performance benchmarks
- Reference designs
- SDK and DPDK samples
- Solution demos (AI NIC, Storage)
- Hardware design guidelines
Systems user-guides
Get Started with E-Series
Build software-defined infrastructure on standard Linux tools. E-Series runs XDP, DPDK, and SPDK out of the box.
