Accelerate Gateway + Network Packet Broker Solutions

Filter, steer, and monitor traffic at 12.8 Tbps line rate on X2 silicon, with brokering logic you program instead of a feature set fixed at tape-out. 12.8 Tbps line rate • 1M+ table entries • 1RU under 475W

Why build packet brokers and gateways on programmable silicon?

Just as x86 and Arm define how software interacts with CPUs, XISA defines how software interacts with Ethernet switch silicon. It's the first fully documented, openly available instruction set for programmable switching.

X2 programmable Ethernet switch chip, angled view
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X2 removes the trade-off. It is a 12.8 Tbps programmable Ethernet switch built on the Xsight Instruction Set Architecture (X-ISA), the first fully open instruction set for Ethernet switch silicon. Brokering, filtering, and gateway logic run as software on the packet-forwarding engine at full line rate, in under 200W. When your visibility fabric needs a new capability, you write it, load it, and keep the same hardware.

Brokering and Gateway Services on X2

X2 combines the throughput of a data center switch with the packet manipulation depth that visibility and gateway workloads demand. Four capabilities do the work.

Filtering icon
Line-rate programmable filtering

The X-ISA parser walks up to 256 bytes of headers and generates lookup keys in software. Filter, classify, and steer at 12.8 Tbps with no recirculation penalties.

Port aggregation icon
Tool-port aggregation and steering

128 x 100G PAM4 SerDes support 25 to 800 GbE port speeds. More than 1M table entries hold filtering and forwarding rules, 8x the scale of incumbent 12.8T silicon.

Telemetry icon
X-VIEW telemetry suite

In-band telemetry, sFlow, postcards, microburst detection, black hole localization, and any-cause verbose mirroring give the visibility fabric its own visibility.

Memory icon
Elastic table and buffer memory

X-PND allocates fully shared memory between control tables and packet buffer, so a filter-heavy broker profile and a buffer-heavy gateway profile run on the same chip.

Deployment Architectures

Three deployment models cover visibility fabrics, gateway functions, and custom in-network processing. Each runs on X2-based open networking platforms shipping today.

Packet broker and visibility fabric

Aggregate monitored traffic from production links, filter it in the X-ISA data plane, and distribute it to analysis tools at line rate.

  • 12.8 Tbps full-duplex, non-blocking throughput in a single chip
  • Port configurations up to 128 x 100GbE, 32 x 400GbE, or 16 x 800G OSFP
  • More than 1M table entries for filter and steering rules
  • ECMP, WECMP, LAG, and flowlet-granularity dynamic load balancing across tool ports
  • Available on Edgecore X2-based switch platforms and the Interface Masters Tahoe 3832 EX; Niagara Networks hosts its FabricFlow packet broker engine on the X2-based Tahoe 3828 EXA
Gateway functions

Run cloud and carrier gateway services, including Carrier NAT and load balancing, on X2-based platforms instead of racks of x86 appliances.

  • X2 switches L1-L4 traffic at 12.8 Tbps and under 200W
  • Pair X2 with E1 DPUs for stateful L4-L7 services: the Tahoe 3828 EXA combines 11.2T of L2-L4 switching with 1.6T of L4-L7 processing in 1RU at under 475W
  • Sustains hundreds of millions of flows with zero packet loss on the 1.6T SONiC DASH datapath
  • Greater than 28M connections per second of Vnet-Vnet DASH virtual services performance
Programmable filtering and telemetry via X-ISA

Build brokering features the silicon vendor never shipped: proprietary header parsing, custom tunnel termination, in-band telemetry insertion, and packet tracing, all written against a published instruction set.

  • X-ISA is published on GitHub with Parser and MAP instruction sets documented
  • Parallel execution model maintains line rate as features are added, unlike serial P4 pipelines that lose 50% of rate on recirculation
  • X-SDK toolchain with the XBM instruction-accurate behavioral model for pre-silicon development
  • Native SONiC/SAI integration keeps operations on standard tooling

Platform Options for Packet Brokering

Three ways to build a brokering layer, in ascending order of programmability and service depth.

  • Option 1

    Fixed-function broker appliance

    The incumbent approach. A fixed-pipeline switch ASIC or x86 appliance delivers today's filtering feature set. New encapsulations, telemetry formats, or steering behaviors wait for the vendor's next hardware generation, and x86 datapaths are limited to 100G and 200G connectivity.

  • Option 2

    X2 programmable broker

    An X2-based open networking platform, such as the Edgecore Universal ToR or Interface Masters Tahoe 3832 EX, runs brokering logic in X-ISA software at 12.8 Tbps line rate. Filtering behavior changes by loading new code, not new hardware.

  • Option 3

    Enhanced switch appliance (X2 + E1)

    The Interface Masters Tahoe 3828 EXA adds two E1 800G DPUs to the X2 switch, combining 11.2T of L2-L4 brokering with 1.6T of stateful L4-L7 processing in 1RU at under 475W. One platform covers packet brokering, gateway services, and advanced instrumentation telemetry.

Accelerate Features

Parameter
Description
Switch Silicon Architecture
Programmable packet-forwarding engine with two stages: a Parser that walks up to 256 bytes of headers and a Match-Action Processor, executing in parallel rather than a serial pipeline
Network Processing Capacity
12.8 Tbps full-duplex, non-blocking; SKUs at 3.2, 6.4, 9.6, and 12.8 Tbps with identical software
Port Interface Speeds
25/50/100/200/400 GbE across 128 x 100G PAM4 LR SerDes; up to 16 x 800G OSFP or 32 x 400G
Forwarding Latency
450 to 700ns first-bit-in to first-bit-out, cut-through
Table Scale
More than 1M entries for filtering, steering, and forwarding rules
Traffic Management
ECMP, WECMP, LAG, MLAG, flowlet-granularity dynamic load balancing; WRED, ECN, and PFC congestion handling
Telemetry and Visibility
X-VIEW suite: in-band telemetry, postcards, sFlow, microburst detection, black hole localization, any-cause mirroring, real-time statistics histograms, SerDes link quality meters
Data Plane Programmability
X-ISA open instruction set (published on GitHub); P4 compiler development enabled
Software Stack
Native SONiC/SAI via XSAI; X-SDK with XSW, XHAL, and XBM behavioral model
Power Envelope
Under 200W at 12.8T, under 140W at 6.4T, under 90W at 3.2T
Timing and Synchronization
IEEE 1588 PTP and Synchronous Ethernet

Built on X2

X2 contributes the programmable data plane that brokering and gateway workloads run on: 12.8 Tbps of non-blocking switching, more than 1M table entries, and an open instruction set that puts filtering logic under your control. Full specifications, SKU variants, and the software stack live on the product page. X2 Programmable Ethernet Switch, GA since November 2024.

X2 switch silicon package on dark background

Validated by the Ecosystem

Edgecore Networks logo

Edgecore Networks is proud to introduce a new portfolio of programmable, versatile switches powered by X2 silicon, enabling a wide range of use cases”

Nanda Ravindran

VP Product Management, Edgecore Networks

Niagara Networks logo

The Tahoe 3828 EXA delivers the highest service density per watt and per rack unit of any alternative on the market, and we are confident this partnership will provide the lowest total cost of ownership for our strategic customers.”

André Vink

VP of Products and Engineering, Niagara Networks

Deploy with Partners

Industry-leading technology partnerships that enable silicon performance, interoperability, and ecosystem compatibility.

  • Edgecore Networks logo

    Universal ToR switch platform on X2 silicon, with Network Packet Broker named among its supported applications.

  • Interface Masters logo

    Tahoe 3828 EXA (X2 + E1) and Tahoe 3832 EX (X2) enhanced switch appliances, shipping to strategic customers from Q1 2026.

  • Niagara Networks logo

    FabricFlow packet broker engine hosted on the Tahoe 3828 EXA.

What's next

Visibility and gateway layers are becoming software problems

Visibility and gateway layers are becoming software problems. As links move to 400G and 800G, the platforms that filter, steer, and inspect that traffic need line rate and feature velocity at the same time, and fixed-function silicon delivers only one of the two. Open, efficient, and programmable infrastructure closes that gap.

The Xsight Accelerate program packages what a brokering or gateway project needs to start: software assets, technical documentation, performance benchmarking, architectural blueprints, and starter development kits, backed by an ODM and software partner ecosystem already shipping X2-based platforms.

Ready to build a brokering layer you can program?

The Accelerate program provides software assets, technical documentation, performance benchmarking, architectural blueprints, and starter development kits for teams building on X2.