Programmable ethernet silicon
X2 Switch
12.8T · <200W · 5nm
XISA
Open instruction set
Data processing units
E1 DPU
800G · 64 Arm cores
E1L DPU
200G · 8–22 Arm cores
Programmable, line-rate infrastructure for AI, cloud, and edge — without the usual trade-offs.
The program
Xsight Accelerate
Blueprints, code, and SONiC support to cut time-to-market
By workload
Storage Acceleration
800G NVMe-oF offload with inline hardware encryption
Gateway & Packet Broker
Filter, steer, and monitor traffic at line rate on programmable silicon
Technical depth and real-world validation for your infrastructure decisions.
Insights
Blog
Driving the evolution of open, scalable infrastructure.
Customer Case Studies
Real results from production deployments
Library
Whitepapers, analyst reports, and solution briefs
E1 TCO calculator
Estimate your savings from the E1 DPU
Support
FAQs
Quick answers and direct access to our team
Documentation
Specs, APIs, and integration guides
Learn
XISA hub
Tutorials, glossary and the specification
Avoiding vendor lock-in
SDK, toolchain and roadmap exposure
Deploying new protocols
On switches already in your racks
Switch buying guide
Ten questions for any vendor
Rearchitecting cloud infrastructure with open, efficient, programmable silicon for AI and beyond.
Company
Our story
Rearchitecting the foundation of cloud infrastructure
Leadership
The team behind the silicon
Newsroom
Latest news and press releases
Careers
Build the silicon powering AI infrastructure
Contact
Contact us
Get in touch with our team
We’re hiring across silicon, software, and go-to-market.